Hi Bob,

Decreasing the feedback capacitor increases the gain for both signal and
series (FET) noise so the ENC contribution from the FET is unchanged.
If  Cf is reduced then Rf has to be increased to maintain the 40 ns time
constant. Increasing Rf leads to a reduced parallel noise contribution from
this component.

Of course the final noise is a combination of all contributions, so another
way of looking at it is that as the Rf noise reduces, other components
become more significant, but they don't actually increase. The bottom line
is that the bigger you can make Rf, the better, but this does come at the
cost of reduced dynamic range.

The table you saw yesterday shows hand calculations of the benefit of
increasing Rf. You can find it again at:

  http://www.hep.ph.ic.ac.uk/~dmray/pptfiles/EEisues.ppt

The measured noise for the 8p2//4k7 combination is also shown. The measured
values are a bit larger than I estimated. It is possible that there was
some interference contribution in the environment, although I took some care.

Anyway, if we assume the noise is 3300e for Cf//Rf = 8p2//4k7, it should
reduce to 3175e if we go to 6p8//5k6.

I don't think we should go any lower, as we will become more sensitive to
stray capacitance (in parallel with Cf) on the VFE card, which might lead
to channel to channel pulse shape variations (because Cf determines the
pulse shaping differentiation time constant).

So, the noise benefit is rather small, but there is no point having more
dynamic range than you really need.

Hope this helps.

Cheers, Mark.

At 15:19 15/12/2004 +0000, Brown, RM (Bob)  - PPD wrote:
>Mark, thanks for this.
>
>My current thinking is to reduce the dynamic range by decreasing C(f) to
>6.8pF, giving full scale = 10.5 pC.
>This is because the crystal and VPT will 'age' reducing the charge/MeV with
>time.  At the start we can reduce the VPT bias to avoid saturation, then
>increase the bias later to compensate for aging.
>
>However, I now realise that although decreasing the MGPA full scale
>decreases the R(f) noise, this improvement is offset by an increase in the
>FET noise, which starts to become important when C(f) becomes small.
>
>Have I understood correctly?  What is your estimate for the total noise with
>C(f) = 6.8 pF and R(f) = 5.6k?
>
>Bob.
>
>-----Original Message-----
>From: Mark Raymond [mailto:m.raymond@imperial.ac.uk]
>Sent: 15 December 2004 13:20
>To: claire.shepherd-themistocleous@rl.ac.uk; Lodge, AB (Tony); Bell, Ken;
>matthew.ryan@imperial.ac.uk; Brown, RM (Bob) - PPD
>Subject: protection resistor noise
>
>
>Hi,
>
>I gave some consideration to the noise contribution of a possible
>protection resistor and am attaching a note. I was too pessimistic about
>its noise contribution as you can see, but it depends on where you put it.
>If it can go on the HV card, close to the VPT then its contribution will be
>small. If it goes on the motherboard and sees the significant capacitance
>of the umbilical cable, then its contribution will be much larger.
>
>I assume this accounts for Claire's measurements.
>
>Cheers, Mark.
>
>------------------------------------------------------------------
>   Mark Raymond
>   Blackett Laboratory
>   Imperial College       phone: +20 7594 7799
>   London SW7 2AZ         fax: +20 7823 8830
>------------------------------------------------------------------

------------------------------------------------------------------
  Mark Raymond
  Blackett Laboratory
  Imperial College       phone: +20 7594 7799
  London SW7 2AZ         fax: +20 7823 8830
------------------------------------------------------------------