Phase II demonstrator VME address map

There will be three crates in the demonstrator. If we use exclusively A24 addressing, then the total VME address space available is 16 MB. One goal is to ensure that every device occupies a unique address range and its address does not have to be changed if we move it to another crate (even though this is not actually possible for the Cluster Processing Modules as they have a special crate). Master VME crate containing:

• MVME 167 processor
  This occupies no VME address space.
• Master VIC for VMVbus to FADC and demonstrator crates
  The internal registers reserve 1 MB of address space, starting on a 1 MB boundary.
• CBD 8210 CAMAC branch driver possibly
  This maps D16 A24 only into CAMAC address space thus: 10BB'BCCC'NNN'NAAA'AFFF'FF10. Internal registers are addressed as branch 0 crate 0. We use branch 1. The address range is therefore 800000 to 97FFFF.
• MacVee
  This occupies no VME address space
• Timing Control Module
  This occupies 64 bytes of address space, starting on any 256 byte boundary.
• UA1 crate controller
  Occupies no space because we will not be using it!
• VIC to level 2 or RD13 systems possibly
  The worst case is that we have the master VIC in our crate, which requires 1 MB starting on a 1 MB boundary to map its internal registers and another 1 MB mapped to a remote crate containing another VIC with shared memory. This is 2 MB total. The most likely case is that we have a slave VIC which maps 1 MB.

FADC crate, which will contain the following if configured

• Slave VIC
  This will map a 1 MB block of addresses in this crate into the master crate where it will occupy the same range of addresses. This block will contain addresses for all modules in this crate.
• 9 Heidelberg FADC modules
  The GALs are programmed to allow the FADCs to start at C10000 and a maximum of 32 can be present (if we had that many slots!). This would use up the address range C10000 to C11FFFF, which is 8 KB.
• 9 Transmitter modules
  These can be mapped to any 64 KB boundary. This means they will occupy a block of address 288 KB wide.

Demonstrator crate, which will include a VME bus and contain:

• Slave VIC
  This will map a 1 MB block of addresses in this crate into the master crate where it will occupy the same range of addresses. This block will contain addresses for all modules in this crate.
• 9 Cluster Processing Modules
  Each module can be placed at a 64 KB boundary. Nine of them will therefore require 288 KB address space.

Total address space used in master crate is

• Master VIC registers = 1 MB
• FADC crate address space = 1 MB
• Demonstrator crate address space = 1 MB
• Worst case VIC configuration for level 2/RD13 = 2 MB
• CAMAC Branch Driver = 1.57 MB
• Timing Control Module = 256 Bytes

Total = 6.57 MB (out of 16 MB available)

J. L. Leake

This page was last updated on 16 December, 2013
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