ATLAS Level-1 Calorimeter Trigger
Hardware Progress Meeting - 24 August 1999

Minutes

Present: Norman Gee, Bob Hatley, Tony Gillman, Viraj Perera, Richard Staley

1. DSS motherboard status and test plans
Viraj reported that the two assembled DSS modules had unfortunately been returned 
from the assembly company to the wrong address. This module has certainly had more 
than its share of life’s troubles! It is hoped that the modules will be recaptured by RAL 
by 27th August. The front panels are currently being prepared for manufacture. James 
and Kevin should be starting basic testing on 1st September after the public holiday. If 
these tests proceed smoothly, the modules will be exercised with Kithsiri’s diagnostic 
software in Lab 12, hopefully starting on 3rd September. Richard plans to be here around 
this time in order to test the operation of the LVDS daughter-cards with the DSS, after 
which the first module will go to Birmingham for systematic tests using the DAQ 
system. The second DSS will remain at RAL for testing the S-link boards.
The remaining four boards will not be assembled until operation of the G-link daughter-
cards has been satisfactorily established.

2. Link cable assemblies
Bob reported that he had not yet had a reply from the distributor of the AMP cable 
assemblies. We need to know if we can obtain assemblies longer than 10m (up to 20m 
would be ideal), and if we can obtain the raw cable for cutting to our choice of lengths. 
If he fails to get any response soon he will order ten 10m assemblies, and we will use 
the technique discussed at the previous meeting to join pairs of shorter length 
assemblies.
Richard reported that the Birmingham technicians had already mounted BERG 
connectors on to two 10m cable assemblies, and were currently preparing two 5m 
assemblies.
Richard will also send the AMP cable specifications for approval to the appropriate 
CERN safety people, with whom he has already been in contact.
Richard commented that the results obtained by Uli and Juergen for LVDS operation 
using a cable pre-compensation network were very interesting. It was agreed that we 
should plan to try something similar ourselves, using RC or LC networks at the driver 
end in order to widen the receiver eye pattern.

3. G-link daughter-card status
Bob reported that the four Tx pc boards were currently being manufactured, and were 
expected back at RAL on schedule by the end of August. Assembly of two boards 
would follow in early-September.

4. CPM prototype specifications document
Richard now has a draft 0 of the specifications available on his web-page. There are still 
several places where more thinking is needed, so it was agreed that he will present a 
summary of the document at the next Hardware Progress meeting, highlighting areas 
where some “brainstorming” is necessary.

5. ROD prototype specifications document
Viraj is just completing a pdf version of the document. When ready, it will be made 
available via the web to the original reviewers for a brief re-assessment.
6. CP ASIC specifications
Viraj and Alan have already met to discuss the algorithm specifications. Alan has to do 
some more work on the handling of triggers involving saturated pulses (e.g. how to 
inform level-2 about the associated RoIs, etc.).
We need to define a PDR date for this component by early September (for the next 
Trigger/DAQ Steering Group meeting?).

7. CMM/SMM prototype specifications
There has not been any further progress in this area. 

8. Any other business
Tony now has a reply from Philippe Farthouat, answering the outstanding queries from 
Bob about the TTCrx chips.

* Next meeting – Wednesday (or Thursday) 8th (or 9th) September at 10.00 at 
Birmingham University – location and date to be confirmed. 

Tony Gillman