ATLAS Level-1 Calorimeter Trigger
Hardware Progress Meeting - 26th January 1999

Minutes:

Present:	Eric Eisenhandler, John Garvey, Norman Gee, Tony Gillman,
Bob 			Hatley, Viraj Perera, Richard Staley

1. Birmingham CADENCE account:
Richard reported that ,although the paperwork had been completed, the
necessary directories were still absent from the RAL server. Viraj had been
assured that they would be installed today, and Richard would try to access
the server remotely before returning to Birmingham.

ACTION: Urgently establish reliable remote use of CADENCE design tools -
Richard

2. DSS motherboards and daughter-cards, and ROD prototype:
Viraj reported that the specification documents for both the DSS and the
ROD prototype were now ready for reviewing. They will be put on to the new
L1 Web pages on Friday 29th January for access by the review panel. The
S-link cards have not yet been ordered.
Richard and Bob have written draft-0 specifications for the LVDS and G-link
daughter card designs, which will be discussed during this week, with final
versions posted on the Web by Friday 29th January. Bob has provisionally
booked the Drawing Office for a layout in mid-March, which it was decided
should be allocated to the urgent LVDS cards, with the G-link cards to
follow ASAP.
To try to minimise future bottlenecks in the Drawing Office it was agreed
to investigate training a Birmingham technician in the use of CADENCE
layout tools - remotely from Birmingham - for future designs. Even
component placement alone would be valuable as Richard would be closely
involved. Final tracking could possibly be done at RAL.

ACTION: Check delivery times on S-link cards - Viraj
ACTION: Post all four design specification documents on to the Web -
Norman/Viraj
ACTION: Book provisional Drawing Office layout date for the G-link cards - Bob
ACTION: Identify suitable Birmingham technician for layout training -
John/Richard

3. We agreed to interchange the order for reviewing the Serialising and CP
ASICs. with the Serialising ASIC specifications now available for review by
Friday 5th February. Viraj has not yet started preparing the CP ASIC
specifications, but a target review date of 26th February was set.
Viraj has almost completed the specifications for the CCM prototype, for
which we had originally set a review date of 19th February.

4. Richard has a preliminary draft for the CPM prototype specifications
available on his Web page (http://www.ep.ph.bham.ac.uk/user/staley/). All
are encouraged to read this and comment before the next meeting. A target
review date of mid-March was set.

ACTION: Read/comment on CPM prototype draft specifications document - ALL

5. Norman summarised the queries regarding the unification of the CMM and
JMM designs raised by Kithsiri's system-wide study. Details of RoI data
collection via the Jet Processor crate backplane are not fully described in
the TDR, and may impact on a unified design. More information is required
before Kithsiri can start backplane simulation work.

ACTION: Discuss with Sam/Uli and try to obtain backplane pin inventory - Norman

6. Norman outlined some of the issues regarding the infrastructure in the
ATLAS Trigger lab (Lab 12) at RAL. In the near future several points
regarding the DAQ system must be addressed, e.g. for how long should the
68K processors be retained? Some of these issues are currently being
addressed in the Software Group meetings.
Richard said that in Birmingham the old demonstrator system would be used
for the LVDS tests.
A discussion of how many DSS modules to build concluded that the proposed
number of four would be inadequate, as all of those would be used in the
LVDS tests at Birmingham, with none left for G-link/ROD/S-link tests at
RAL. Extra bare boards would be manufactured initially, and loaded only as
and when required. Careful scheduling of the various test phases would be
needed.
The provision of LVDS/G-link cable assemblies was discussed. The GORE
assemblies must be obtained from the manufacturers, and are expensive, so
the lengths must be carefully planned for the tests to be definitive. Are
in-line couplers available, and would they provide adequate performance?
What lessons could be learnt from the Mainz/Stockholm JEM-2 board/cable
tests?

ACTION: Prepare DSS module test specifications - Norman/Scott
ACTION: Check on delivery times for GORE cable assemblies - Richard
ACTION: Obtain latest results from Mainz LVDS/G-link cable length studies -
Tony

7. Next meeting: Tuesday 2nd February at 11.00 in CR1, RAL.

Tony Gillman