Minutes of the ATLAS-UK Level-1 Calorimeter Trigger Meeting RAL Friday 10 Sept. 1999 Present: Ian Brawn, Paul Bright-Thomas, Eric Eisenhandler, Norman Gee, Tony Gillman, Bob Hatley, Kithsiri Jayananda, Murrough Landon, Viraj Perera, Tara Shah, Richard Staley, Bill Stokes, Alan Watson. Data transmission Status of "simple" LVDS transmission tests - Richard Staley Richard described the results of simple LVDS transmission tests carried out using DSS daughter cards, without DSS itself. Power and a clock signal were applied to the transmitter daughter board and zero data were transmitted to the receiver board. The clock signal recovered by the receiver was monitored. Different lengths of cables, clock frequencies, and power supply voltages were tried and the results seem promising. Status of DSS mother & daughter cards - Viraj Perera Viraj mentioned that six DSS boards had been made and two of them had been assembled. FPGA loading had been performed without problems. However VME access did not work. Both board had the same problem and it is being investigated. Bob Hatley mentioned that both G-link daughter cards (transmitter and receiver) were ready. Discussion on test plans for DSS and LVDS Norman asked whether any special cables are required for the tests and Viraj replied that SCSI cables are required. Replying to a question asked by Eric, Tony mentioned that the LVDS tests would be carried out at Birmingham, after initial tests on DSS modules using diagnostic software at RAL. Norman mentioned that a PC had been ordered about a month ago, to be used as an X terminal for running diagnostic software. Eric mentioned that certain decisions depend on the LVDS tests and that it may not be possible to present the results in some upcoming meetings due to the delays in DSS schedule. Hardware status summaries ROD prototype - Viraj Perera Viraj mentioned that updated specifications of the ROD were now on the web, awaiting comments. Design work will start soon. Serialiser - Ian Brawn Ian showed the new block diagram of the serialiser and described the latest changes to the specifications. The device now handles 40 bits, not 20 as in the TDR. Readout has been simplified and some of the logic has been moved to CPM. A preliminary design has been implemented in a Xilinx XCV100 device. Specifications not finalised yet. Timing issues are currently being investigated. Minimum possible skew without compromising internal logic is 2 ns. Murrough asked how much skew is acceptable and Tony replied that it is not known yet. Replying to another question Ian mentioned that the device being used is the one with the highest specification available. CP ASIC plans & specification of algorithm - Viraj Perera A specification document has been prepared, but it is not publicly available yet. Certain features, such as ROI handling in ROD and data formats, are only provisionally defined because not all relevant decisions have been made. Eric mentioned that a decision on the saturation issue should be made soon. CP module prototype design - Richard Staley Richard described the current status of the prototype CPM. Specification document is currently on the web. The production module is expected to cover 4 by 16 ROI cells. The prototype will cover 4 by 6 area. Both production and prototype modules will be a 9U but the prototype will only use a region with 6U height. Currently three types of connectors are being considered for the backplane (Berg, Z pack and HDM). HDM connector seems to be the best option. We must finally come to an agreement with the JEP on whether the CPMs and JEMs span eta = 0 or are divided at eta = 0. We need to know whether there are 13 or 14 CPMs per crate. Merger module options and status - Norman Gee Norman described the current efforts to agree on the Monster Merger Module. There is agreement that a common 40MHz backplane should be built for both CPM and JEM systems. Viability of this should be tested, but simulation results are promising. This backplane will carry 16x3 bits over 8 thresholds. The original idea was to build a common merger module for cluster and jet merging. Among the new ideas being considered are to fit the energy summing into the same system, to carry out the final summing on a separate module, to encode the energy into fewer bits to match calorimeter resolutions and to put the ROI readout back on the HCM or the JEM. The backplane connector and signal level issues are under discussion. A prototype module should be built but the architecture needs to be decided before that. Another phone conference with Mainz and Stockholm collaborators will be held soon. Alan and Paul mentioned that probably no physics would be lost by reducing the maximum hit count from 7 to 3. Simulation of backplane for in-crate merging - Kithsiri Jayananda Results of the backplane simulation were presented. Total crosstalk in a given trace due to 6 neighbours (three on either side) is small (only about 3 micro volts). Additional simulations of simple configurations have been made for better understanding the results. In addition, a comparison between the simulation and a simple calculation has been performed. The simulation results seem to be reliable. A draft report exists and will be circulated soon. Work on TTC - Kithsiri Jayananda A simple system with one TTCvi module and one TTCVx module has been setup at RAL for understanding the TTC system. It has been possible to look various outputs from both modules using an oscilloscope and control the modules via VME using diagnostic software. The next step would be to add a TTCrx test board to the system. Reviews: status and planning - Tony Gillman CPASIC specification has been prepared and the PDR will be held in November, as a one day session at RAL. Draft documentation for CPM is under preparation. Final details depend on some of the decisions to be taken. PDR is expected to be early next year. All future PDRs will be held as round-table meetings between reviewers and designers, as opposed to email reviews held in the past. Murrough suggested holding a first round of each review through email, followed by a final round-table session. Other Topics Encoding of serial data for error detection - Paul Bright-Thomas Paul had modelled a variety of potential burst spectra for understanding data errors. Overall fake trigger rate depends on the source of errors. Placing parity close to LSB saves about 10-15% fake triggers. Although a complex error detection schemes are better, there is a penalty in latency. Therefore single bit parity is sufficient, with odd parity better than even since zero data then has a bit set. The target of less that 1% fake triggers will be met by a BER limit of about 5x10-9. An ATLAS note on this study is nearly ready, and comments are invited. Handling of saturation - Alan Watson Alan discussed the issue of flagging saturation trigger towers to CTP. As events containing saturation are mis-measured they probably should be reported. However this increases complexity and cost. If it is flagged to the level 2 trigger, that should be via RoI information. Still, there is a possibility of having saturated towers outside RoI clusters. As the jet system covers the whole of CP system, it may be sufficient to flag saturation in the jet system. However this should be discussed with the level 2 and JEP groups. Eric mentioned that channels which are always bad can be removed by changing the look up table. However this may not be possible in the preprocessor. Tara mentioned that the missing energy trigger could be the one most affected by saturation. It could cause events with missing energy to be missed. Therefore it should be reported to the level 2. Eric said that this issue should be discussed with the CTP group. Rack and cable layout in USA15 - Murrough Landon Murrough had had many useful interactions with the technical coordination group regarding rack layout. A provisional suggestion is to locate calorimeter trigger racks upstairs (where maximum cable length would be about 10m) and muon, CTP and TTC racks downstairs. Among the outstanding issues are: tile calorimeter cables to level-1 trigger, muon racks, bulk and bending radius of Lar cables and consideration of crates other than trigger (RODs, DCS etc.) Level-1/level-2 interface document - Norman Gee A draft document already exists on the web. (http:/www.cern.ch/Atlas/GROUPS /DAQTRIG/LEVEL1/l1l2draft5_0.pdf). Many constraints can be met easily. However some trigger type requests need to be discussed. Another issue is whether RoIs should be sorted by Et, which is not straightforward for us. Comments regarding the documents are needed within a few weeks. Software Software status and activities - Murrough Landon Both DAQ and diagnostic software has been updated for the latest DSS specifications. Recently several brainstorming sessions were held for preparing a requirements documents and 'use cases' for software. An achievable suite of new software for the ROD prototype is the main target for the near future. It was decided to have a software meeting on Sept 23. Preparations for PPESP status report Document - Norman Gee This is a report submitted every two years. The document, which will be circulated soon via email, describes the work done since May 1997. The level-1 part is restricted to 3 pages plus figures. It consists of five sections: developments since 1997, project progress, organizational changes, resources and milestones and conclusions. Eric mentioned that one must be prepared to produce costing details if requested. Costing - Norman Gee A first revision has been made in the UK. Need to have some more discussions. Rehearsal of talk (zeroth order) Paul presented a rehearsal of the talk. However, it was not expected to match the document prepared by Norman because Paul had not yet seen it. Difficulty of presenting all the details within the allowed 10 minute time slot was obvious. There were number of suggestions for making maximum use of time. Coming events Meeting with LHCC referees Eric said that the annual meeting with LHCC referees is scheduled on 18th and 19th Oct. Two hours are allocated for presentations by level 1 trigger. Several presentations by different parts of level 1 trigger should be prepared. As non UK groups are involved further discussions will be through email. Future papers and ATLAS notes Eric mentioned that mistakes that happened in the preparation of papers in the past should not be repeated. At present several potential ATLAS notes are being prepared by Paul, Kithsiri, Richard and Alan. Any other business Date of next meeting Next meeting was tentatively scheduled on 27th October.