ATLAS Level-1 Calorimeter Trigger
Hardware Progress Meeting – 24th April 2001

Minutes

Present: Bruce Barnett, Ian Brawn, Eric Eisenhandler, Norman Gee, Tony Gillman, 
Murrough Landon, Gilles Mahout, Viraj Perera

1. CP FPGA status
James Edwards is still detained in ROD-land, so there has been no further progress 
with the CP FPGA.

2. Generic Test Module
Viraj reported that all the components have now been ordered for one new board. Two 
spare PCBs will also be ordered. RAL Purchasing are seeking to recover all the costs 
(PCB, components and assembly), but we should recover at least the components’ 
cost.

3. TCM and Adapter Link Card
In Bob’s absence, Tony reported that the layouts of the TCM ALC are both complete. 
After discussions, a total of seven TCMs will be manufactured and assembled (two 
for each of the PPr, CP and JEP subsystems plus one spare module).

4. CPU Personality Card
Tony also reported that before he went on vacation Bob had managed to get the 
schematics for the CPC into the Drawing Office for layout.

5. ROD tests – next stage
Norman summarised the lessons learnt from the successful ROD integration tests at 
CERN:
? The results will be written up as an ATLAS note
? Minor bugs will be discussed and resolved with Viraj Perera et al
? Web access to all module schematics and layouts should be made available
? VHDL web access would be difficult for source code created graphically
? Clearly document different versions of firmware on the web (use of CVS?)
? The DSS firmware should be modified to provide wrap-around of source data
? Complete the 9U RoIB integration tests before the Slice Tests (at CERN or RAL?)
? All modules should have a copious number of useful test-points (DAV, L1A, …)
? Bruce will resume the ROD DAQ-slice tests at RAL
? Investigate observed intermittency with the ROD TTCdec/Interposer combination

6. CPM
Gilles reported that he and Richard had now started writing the ROC firmware, which 
will need some of Ian’s ROC code to be imported. It will be completed within the 
next two weeks.

7. CMM
Ian reported that the DSS CMC test cards for the CMM will provide bi-directional 
LVDS and CMOS buffering, using the flexible I/O capabilities of a large FPGA.
Version 0.95 of the CMM specification document, containing a small number of 
changes, is now on the web. An informal schematics review will be held in early May.

8. AOB
Eric reported that the Conceptual Design Review (CDR) for the LAr Receiver system, 
held on the 3rd April 2001, resulted in no significant conceptual design changes. There 
were issues relating to revisiting the choice of operational amplifier, and with co-
ordinating the schedule for integration tests with our PPMs. A report on the CDR will 
be issued shortly.

Next meeting - Tuesday 8th May at 14.00 in CR01, R1 at RAL. Refreshments will be 
provided.